Proving Entailment Between Conceptual State Specifications

The lack of expressive power of temporal logic as a speciication language can be compensated to a certain extent by the introduction of powerful, high-level temporal operators, which are diicult to understand and reason about. A more natural way to increase the expressive power of a temporal speciication language is by introducing conceptual state variables, which are auxiliary (unimplemented) variables whose values serve as an abstract representation of the internal state of the process being speciied. The kind of speciications resulting from the latter approach are called conceptual state speciications. This paper considers a central problem in reasoning about conceptual state speciications: the problem of proving entailment between speciications. A technique, based on the notion of simulation between machines, is shown to be sound for proving entailment. A kind of completeness result can also be shown, if speciications are assumed to satisfy certain well-formedness conditions. The role played by entailment in proofs of correctness is illustrated by the problem of proving that the concatenation of two FIFO buuers implements a FIFO buuer.